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Page 12 Operation Theory
MD 1998LE (B1997PNST)
voltage.
2. Regulation
The DC O/P voltage is proportional to the auxiliary voltage, so I802 pin 2 senses the feedback voltage
from the divider R895, R888, R868, R897 and VR801 to compare with the built-in 2.5 volts reference
voltage for error amplifier operation. Finally pin 6 can modulate the different duty cycle by VR801 setting
to achieve regulation purpose.
3-4-7 Synchronization
1. Normal Mode
The sync pulse from FBT (31 kHz~93.75 kHz) via R820, C833, D806, R818 and C832 to pin 4 of I802 to
keep I802 synchronized with horizontal sync input frequency.
2. Power Saving Modes: Standby/Suspend
Because there is no pulse from FBT, so the free-run frequency is decided by R817 and C832 and the
SMPS works at 20 kHz.
3. Override
The horizontal free run frequency is about 62 kHz under override condition, SMPS is synchronized to this
frequency.
3-4-8 O.V.P.
If the auxiliary voltage is higher than zener voltage ZD806 (22 volts) and makes pin 3 of I802 higher than
1 V, pin 6 duty cycle is limited to have the OVP activated.
3-4-9 O.P.P.
The excess current of T805 through R819 can develop enough voltage on pin 3 then limit the power delivered
because the pin 6 duty cycle is limited too.
3-5 HV Supply
1. HV (High Voltage) start up is triggered by H-pls at pin 4 via R107. I103 3843 provides the PWM output
control (pin 6) to drive the step up B+ supplier Q103 via D105 and C108.
2. The time constant is dependent on the H-DRIVER through R140 via inverter I101 and buffer Q106 /Q107
to drive Q104.
3. I401 pin 32 provides the H+V composite signals to drive the two-stage dynamic focus amplifier. Output
of vertical amplitude is around 150 Vpp, while output of horizontal amplitude is around 670 Vpp.
Vertical dynamic focus
14


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