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SECTION 4
TECHNICAL DESCRIPTION
4.1 GENERAL
The RAY106 can be considered as consisting of two major sections.
The Control Section (consisting of the front panel controls, LCD display, and CPU).
The Transmitter/Receiver / PLL Section.
4.2 THE CONTROL SECTION
The heart of the control section is the CPU, which is IC101 located on the CPU PCB. The
CPU controls all of the following items :
Controls the Squelch circuit by detecting a busy signal from the 2nd IF circuit IC101 on the
Main PCB.
Generates a beep tone when a key is activated on the keyboard.
Mutes the transmitter modulation circuit when receiving.
Controls the output power of the transmitter High/Low.
Controls the dividing ratio N of the PLL circuit.
Switches ON/Off the transmitter power.
Mutes AF audio.
Detects a weather alert signal (when in Monitor Mode).
Controls the LCD display.
4.3 THE TRANSMITTER/RECEIVER/PLL SECTIONS
In reading through the following circuit descriptions, it may be helpful to refer to Figure 4-1
Block Diagram of the TX/RX/PLL circuits.
4.3.1 PLL (Phase Lock Loop) Circuit
The PLL circuit is oscillating the standard frequency with the PLL IC ( IC3 ) and 12.8MHz
crystal filter XTL1. This is divided into 1/512 in the IC3 to make 25KHz reference frequency.
RF output from VCO unit ( VCO1 ) will be input to PLL IC ( IC3 ) pin8 via buffer amplifier Q10.
The dividing ratio data stored in the CPU IC101 will be output to pin10 and clock signal will be
output to pin9 of the PLL IC ( IC3 ). And when the chip enable signal is input to pin11 of PLL
IC ( IC3 ) the dividing ratio data will be latched to the PLL IC ( IC3 ). The phase of the
frequency which is a input frequency to the PLL IC ( IC3 ) divided by the CPU stored dividing
radio and the 25KHz reference frequency is compared correlated to control voltage by charge
pump transistors Q11, Q12. That is input to the pin of VCO unit ( VCO1 ).
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