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Service request enable register
This register is programmed by you and serves as a mask for the Status Summary Mes-
sage bits (B0, B2, B3, B4, B5, and B7) of the Status Byte Register. When masked, a set sum-
mary bit in the Status Byte Register cannot set bit B6 (MSS/RQS) of the Status Byte
Register. Conversely, when unmasked, a set summary bit in the Status Byte Register sets
bit B6.
A Status Summary Message bit in the Status Byte Register is masked when the corre-
sponding bit in the Service Request Enable Register is cleared (0). When the masked sum-
mary bit in the Status Byte Register sets, it is ANDed with the corresponding cleared bit in
the Service Request Enable Register. The logic “1” output of the AND gate is applied to the
input of the OR gate and, thus, sets the MSS/RQS bit in he Status Byte Register.
The individual bits of the Service Request Enable Register can be set or cleared by using
the following common command: *SRE <NRf>
To read the Service Request Enable Register, use the *SRE? query command. The Ser-
vice Request Enable Register clears when power is cycled or a parameter (n) value of zero
is sent with the *SRE command *SRE 0).
2000-900 (J - Aug 2010) BOOK.fm Page 27 Wednesday, October 12, 2011 12:29 PM
106


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